IP Library Assignment 025764/0527
Patent Assignment
Reel/Frame 025764/0527

Assignment of Assignor's Interest

Recorded: 2010-12-22 Pages: 3
Assignor
PIROG, JERRY
Executed: 2010-12-21
Assignee
LSI CORPORATION
1621 BARBER LANE, MILPITAS, CALIFORNIA, 95035
Covered Property (1)
Concurrent, Coherent Cache Access for Multiple Threads in a Multi-Core, Multi-Thread Network Processor
Patent: 8,935,483 →
Application: 12/976,228 →
Publication: US 2011/0225372
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Patent Security Agreement May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Termination and Release of Security Interest in Patents at Reel/Frame No. 32856/0031 Nov 18, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034286/0872 →
Assignment of Assignor's Interest Feb 24, 2015
From: LSI CORPORATION
To: INTEL CORPORATION
Reel/Frame 035090/0477 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031) Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →