IP Library Assignment 025852/0458
Patent Assignment
Reel/Frame 025852/0458

Assignment of Assignor's Interest

Recorded: 2011-02-23 Pages: 3
Assignor
ARENA, CHANTAL
Executed: 2011-02-22
Assignee
S.O.I.TEC SILICON ON INSULATOR TECHNOLOGIES
CHEMIN DES FRANQUES, PARC TECHNOLOGIQUE DES FONTAINES, BERNIN, 38190, FRANCE
Covered Property (1)
Methods of Fabricating Semiconductor Structures or Devices Using Layers of Semiconductor Material Having Selected or Controlled Lattice Parameters
Patent: 8,765,508 →
Application: 13/060,398 →
Publication: US 2011/0156212
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Change of Name Feb 28, 2012
From: S.O.I. TEC SILICON ON INSULATOR TECHNOLOGIES; CHEMIN DES FRANQUES; PARC TECHNOLOGIES DES FONTAINES; BERNIN. FRANCE 38190
To: SOITEC
Reel/Frame 028138/0895 →