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Patent Assignment
Reel/Frame 026077/0460

Assignment of Assignor's Interest

Recorded: 2011-04-05 Pages: 3
Assignor
AHMED, RIZWAN
Executed: 2011-04-05
Assignee
FUJITSU SEMICONDUCTOR LIMITED
2-10-23 SHIN YOKOHAMA, KOHOKU-KU, YOKOHAMA-SHI, KANAGAWA, 222-0033, JAPAN
Covered Property (1)
System and Method for Reducing Lock Acquisition Time of a Phase-Locked Loop
Patent: 8,599,985 →
Application: 13/080,196 →
Publication: US 2012/0257701
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
Assignment of Assignor's Interest Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
Confirmatory Assignment Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
Assignment of Assignor's Interest Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →