Patent Assignment
Reel/Frame 031105/0416
Assignment of Assignor's Interest
Recorded: 2013-08-28
Pages: 13
Assignor
FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Executed: 2013-07-12
Assignee
INTEL IP CORPORATION
2200 MISSION COLLEGE BLVD., SANTA CLARA, CALIFORNIA, 95054
Covered Properties
(64)
Radio-Frequency Transmitter and Amplifier
Reconfigurable Diversity Receiver
Emission Suppression for Wireless Communication Devices
Application:
12/796,229 →
Publication:
US 2011/0299644
System and Method for Duty Cycle Control of a Crystal Oscillator
System and Method for Amplitude Contorl of a Crystal Oscillator
Receiver with Feedback Continuous-Time Delta-Sigma Modulator with Current-Mode Input
System and Method for Crystal Oscillator Frequency Tuning
System and Method for Switch Leakage Cancellation
Systems and Methods for Spurious Emission Cancellation
Merged Filter-Transconductor-Upconverter
System and Method for Multiple Band Transmission
Capless Regulator Overshoot and Undershoot Regulation Circuit
Temperature Dependent Voltage Regulator
System and Method for Reducing Temperature and Process Dependent Frequency Variation of a Crystal Oscillator Circuit
Application:
13/026,425 →
Publication:
US 2012/0206209
Method and System for Reducing Timing Uncertainty of Data Transmission and Reception
System and Method for Tuning an Antenna In a Wireless Communication Device
Common-Mode Feedback Circuit
Linearization Technique for Mixer
Method and System for Controlling Signal Transmission of a Wireless Communication Device
Technique to Generate Divide by Two and 25% Duty Cycle
System and Method for Reducing Lock Acquisition Time of a Phase-Locked Loop
System and Method for Supporting Different Types of Oscillator Circuits
Method and System for Power Control of a Wireless Communication Device
System and Method for Estimating and Correcting Phase Shift in a Wireless Communication Device
System and Method for Reducing Temperature-Dependent and Process-Dependent Frequency Variation of a Crystal Oscillator Circuit
Temperature Compensation Circuit
System and Method for Controlling Current to Certain Components of a Wireless Communication Device
Amplifier with Multiple Zero-Pole Pairs
Self-Calibrated Dac with Reduced Glitch Mapping
Digital Output Driver
Application:
13/193,003 →
Publication:
US 2013/0027092
SYSTEM AND METHOD FOR TUNING A SEMI-DIGITAL FINITE IMPULSE RESPONSE (sFIR) FILTER
Application:
13/195,486 →
Publication:
US 2013/0033335
Digital Voltage-Controlled Attenuator
System and Method for Preserving Input Impedance of a Current-Mode Circuit
System and Method for Improving Power Efficiency of a Transmitter
System and Method for a Dual-Path Transmitter
System and Method for a Multi-Band Transmitter
System and Method for Reducing or Eliminating Temperature Dependence of a Coherent Receiver in a Wireless Communication Device
System and Method for Frequency-Agile Transmission in a Wireless Communication Device
System and Method for Tuning an Antenna in a Wireless Communication Device
Continuous-Time Incremental Analog-to-Digital Converter
System and Method for Linearization of a Mixer
Patent:
8,493,127 →
Application:
13/419,150 →
Broadband Transconductance Amplifier
Differential Transmission Line Shielded By Two Or More Spaced Groups Of Shields
System and Method for Correcting Integral Nonlinearity in an Oscillator System
System and Method for High Performance Coherent Peak Compression Estimation
Patent:
8,639,199 →
Application:
13/594,616 →
Tunable Wideband Distribution Circuit
Delay Compensation for Sigma Delta Modulator
Patent:
8,638,251 →
Application:
13/598,412 →
Frequency Tuning and Step Control of a Digitally Controlled Oscillator
Variable Inductor for LC Oscillator
Signal Peak-to-Average Power Ratio (Par) Reduction
Output Voltage Variation Reduction
Isolating Differential Transmission Lines
Reducing Settling Time in Phase-Locked Loops
Adjusting Tuning Segments in a Digitally-Controlled Oscillator
Hybrid Phase-Locked Loops
Hybrid Phase-Locked Loops
Patent:
8,872,558 →
Application:
13/902,580 →
Input Stage for Temperature Measurement System
Temperature Measurement System
Calibrated Temperature Measurement System
Signal Duty Cycle Reduction
System and Method for Supporting Different Types of Oscillator Circuits
Reducing Transmission Signal Artifact Spacing
Complementary Signal Mixing
Common-Mode Feedback Circuit
Application:
61/423,862 →
Related Assignments
(7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Mar 4, 2011
From: PADMANABHAN, UDAY; XU, BING; STEBBINGS, KENNETH EDWARD
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025901/0918 →
Assignment of Assignor's Interest
Mar 24, 2011
From: PREMAKANTHAN, PRAVIN; XU, BING; KIRSCHENMANN, MARK; BAVISI, AMIT
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026012/0697 →
Assignment of Assignor's Interest
Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
Confirmatory Assignment
Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
Assignment of Assignor's Interest
Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
Assignment of Assignor's Interest
Jun 8, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056524/0373 →
Assignment of Assignor's Interest
Jun 28, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056701/0807 →