IP Library Granted Patent US 8,364,112
Granted Patent B2
US 8,364,112 · App. 13/078,502 · Granted Jan 29, 2013

Linearization technique for mixer

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,364,112
App. No.
13/078,502
Granted
Jan 29, 2013
Kind
B2
Abstract

A technique for improving the linearity of a mixer is disclosed. A converter may include a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an input of the converter, and a second conducting terminal coupled to an output of the converter, and a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to receive a local-oscillator signal having a first phase and a second phase, drive the first MOSFET off during the first phase of the local-oscillator signal, drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal, and force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.

Claims (48)

1. A converter, comprising:

a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an input of the converter, and a second conducting terminal coupled to an output of the converter; and

a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to:

receive a local-oscillator signal having a first phase and a second phase;

drive the first MOSFET off during the first phase of the local-oscillator signal;

drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal; and

force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.

2. The converter of claim 1 , wherein the first MOSFET is an N-type metal-oxide semiconductor transistor.

3. The converter of claim 1 , wherein the first MOSFET is a P-type metal-oxide semiconductor transistor.

4. The converter of claim 1 , wherein the duration of the first period of time is dependent on a propagation delay of at least a first logic gate in the mixer driver.

5. The converter of claim 1 , wherein:

the mixer further comprises a second MOSFET having a gate, a first conducting terminal coupled to the input of the converter, and a second conducting terminal coupled to the output of the converter; and

the mixer driver further comprises a second output coupled to the gate of the second MOSFET, the logic circuit further configured to:

drive the second MOSFET off during the first phase of the local-oscillator signal;

drive the second MOSFET on for a third period of time in response to the transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal; and

force the gate of the second MOSFET into a high impedance state for a fourth period of time during the second phase of the local-oscillator signal and after the expiration of the second period of time.

6. The converter of claim 5 , wherein the first MOSFET is an N-type metal-oxide semiconductor transistor and the second MOSFET is a P-type metal-oxide semiconductor transistor.

7. The converter of claim 5 , wherein the duration of the second period of time is dependent on a propagation delay of at least a second logic gate in the mixer driver.

8. A receiver, comprising:

a local oscillator configured to provide a local-oscillator signal having a first phase and a second phase; and

a converter configured to downconvert a radio-frequency (RF) signal, the converter comprising:

a mixer comprising a first metal-oxide semiconductor field-effect transistor (MOSFET) having a gate, a first conducting terminal coupled to an RF input of the converter, and a second conducting terminal coupled to an intermediate-frequency (IF) output of the converter; and

a mixer driver having a first output coupled to the gate of the first MOSFET, the mixer driver configured to:

receive the local-oscillator signal;

drive the first MOSFET off during the first phase of the local-oscillator signal;

drive the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal; and

force the gate of the first MOSFET into a high impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.

9. The receiver of claim 8 , wherein the first MOSFET is an N-type metal-oxide semiconductor transistor.

10. The receiver of claim 8 , wherein the first MOSFET is a P-type metal-oxide semiconductor transistor.

11. The receiver of claim 8 , wherein the duration of the first period of time is dependent on a propagation delay of at least a first logic gate in the mixer driver.

12. The receiver of claim 8 , further comprising a low-pass filter coupled to the IF output of the converter, the low-pass filter configured to convert an IF signal to a baseband signal.

13. The receiver of claim 12 , further comprising an analog-to-digital converter (ADC) coupled to an output of the low-pass filter, the ADC configured to convert the baseband signal into a digital output signal.

14. A method for reducing non-linear effects in an electronic circuit including a converter, comprising:

receiving an input signal at a first conducting terminal of a first metal-oxide semiconductor field-effect transistor (MOSFET);

receiving a local-oscillator signal having a first phase and a second phase;

driving the first MOSFET off during the first phase of the local-oscillator signal;

driving the first MOSFET on for a first period of time in response to a transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal; and

forcing the gate of the first MOSFET into a high-impedance state for a second period of time during the second phase of the local-oscillator signal and after the expiration of the first period of time.

15. The method of claim 14 , wherein the first MOSFET is an N-type metal-oxide semiconductor transistor.

16. The method of claim 14 , wherein the first MOSFET is a P-type metal-oxide semiconductor transistor.

17. The method of claim 14 , wherein the duration of the first period of time is dependent on a propagation delay of at least a first logic gate in the mixer driver.

18. The method of claim 14 , further comprising:

wherein a first conducting terminal of a second MOSFET is coupled to the first conducting terminal of the first MOSFET, and a second conducting terminal of the second MOSFET is coupled to the second conducting terminal of the first MOSFET;

driving the second MOSFET off during the first phase of the local-oscillator signal;

driving the second MOSFET on for a third period of time in response to the transition from the first phase of the local-oscillator signal to the second phase of the local-oscillator signal;

forcing the gate of the second MOSFET into a high-impedance state during a fourth period of time during the second phase of the local-oscillator signal and after the expiration of the third period of time.

19. The method of claim 18 , wherein the first MOSFET is an N-type metal-oxide semiconductor transistor and the second MOSFET is a P-type metal-oxide semiconductor transistor.

20. The method of claim 18 , wherein the duration of the third period of time is dependent on a propagation delay of at least a second logic gate in the mixer driver.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056524/0373 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2011
From: XIE, HAOLU; SHAH, MANISH N.; RAKERS, PATRICK L.
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026062/0655 →