System and method for preserving input impedance of a current-mode circuit
View Patent ↗In accordance with some embodiments of the present disclosure, a circuit comprises an input node configured to receive a current-mode input signal and an input stage that includes an input device communicatively coupled to the input node. The input device is configured to receive the input signal at the input node. The circuit additionally comprises bias circuitry communicatively coupled to the input stage and configured to provide a bias current for the input device. The bias circuitry is also configured to remove at least a portion of the bias current from the input signal through a feedback loop associated with the input node such that the input signal is received by the input device with at least a portion of the bias current removed. The circuit further comprises an output stage communicatively coupled to the input stage and configured to output a current-mode output signal based on the input signal.
1. A circuit comprising:
an input stage including an input device communicatively coupled to an input node;
bias circuitry communicatively coupled to the input stage at the input node and configured to provide a bias current for the input device, the bias circuitry comprising a resistor coupled to the input node and configured to completely remove all the direct-current (DC) current from a cascode stage; and
a cascode stage communicatively coupled to the input stage and the bias circuitry at the input node and configured to provide a low input impedance to the received input signal; and
an output stage communicatively coupled to the input stage and configured to output an output signal based on the input signal.
2. The circuit of claim 1 , the output stage further configured to apply a gain to the input signal such that the output signal is at least a function of the input signal and the gain.
3. The circuit of claim 1 , further comprising a buffer stage communicatively coupled between the input stage and the output stage and configured to separate the input stage from the output stage.
4. The circuit of claim 3 , at least one of the input stage, the buffer stage and the output stage including a filter configured to filter noise associated with the input signal.
5. The circuit of claim 1 , at least one of the input stage and the output stage including a filter configured to filter noise associated with the input signal.
6. The circuit of claim 1 , the input stage configured for high linearity and the output stage configured for low noise.
7. A transmitting path comprising:
a digital to analog converter (DAC) configured to receive a digital data signal and convert the digital data signal into an analog data signal;
an input node configured to receive the data signal from the DAC;
an input stage including an input device communicatively coupled to the input node and configured to receive the data signal at the input node;
bias circuitry communicatively coupled to the input stage at the input node and configured to provide a bias current for the input device, the bias circuitry comprising a resistor coupled to the input node and configured to completely remove all the direct-current (DC) current from a cascode stage; and
a cascode stage communicatively coupled to the input stage and the bias circuitry at the input node and configured to provide a low input impedance to the received input signal;
an output stage communicatively coupled to the input stage and configured to output the data signal; and
a mixer communicatively coupled to the output stage and configured to receive the data signal from the output stage and modulate the data signal onto a carrier signal to generate a radio frequency (RF) signal.
8. The transmitting path of claim 7 , the output stage further configured to apply a gain to the data signal.
9. The transmitting path of claim 7 , further comprising a buffer stage communicatively coupled between the input stage and the output stage and configured to separate the input stage from the output stage such that the input stage may have high linearity and the output stage may have low noise.
10. The transmitting path of claim 9 , at least one of the input stage, the buffer stage and the output stage including a filter configured to filter noise associated with the data signal.
11. The transmitting path of claim 7 , at least one of the input stage and the output stage including a filter configured to filter noise associated with the data signal.
12. The transmitting path of claim 7 , the data signal associated with at least one of a Global System for Mobile Communications (GSM), an enhanced data rate for GSM evolution (EDGE), a general packet radio system (GPRS) and a Gaussian minimum-shift-keying (GMSK) transmission protocol.
13. A method comprising:
receiving, by an input device of an input stage of a circuit, an input signal at an input node of the circuit;
providing a bias current for the input device with bias circuitry of the circuit communicatively coupled to the input stage at the input node;
providing a low input impedance to the received input signal with a cascode stage of the circuit communicatively coupled to the input stage and the bias circuitry at the input node;
removing all the direct-current (DC) current from the cascode stage using a resistor of the bias circuitry; and
outputting an output signal based on the input signal by an output stage of the circuit communicatively coupled to the input stage.
14. The method of claim 13 , further comprising applying a gain to the input signal such that the output signal is at least a function of the input signal and the gain.
15. The method of claim 13 , further comprising separating the input stage from the output stage with a buffer stage communicatively coupled between the input stage and the output stage.
16. The method of claim 13 , further comprising filtering noise associated with the input signal.
17. The method of claim 13 , the input signal associated with at least one of a Global System for Mobile Communications (GSM), an enhanced data rate for GSM evolution (EDGE), a general packet radio system (GPRS) and a Gaussian minimum-shift-keying (GMSK) transmission protocol.