IP Library Granted Patent US 8,489,044
Granted Patent B2
US 8,489,044 · App. 13/208,190 · Granted Jul 16, 2013

System and method for reducing or eliminating temperature dependence of a coherent receiver in a wireless communication device

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Quick Facts
Patent No.
US 8,489,044
App. No.
13/208,190
Granted
Jul 16, 2013
Kind
B2
Abstract

In accordance with some embodiments of the present disclosure, a method may include generating a first current equal to a bandgap voltage divided by a resistance selected to approximately match a process resistance integral to a receiver. The method may further include generating a second current equal to temperature-dependent current multiplied by a predetermined scaling factor. The method may also include subtracting the second current from the first current to generate a bias current. The method may additionally include providing the bias current to the receiver.

Claims (36)

1. A wireless communication element, comprising:

a transmit path configured to convert a digital signal output by digital circuitry into a wireless communication signal;

a control path communicatively coupled to the transmit path and configured to monitor and control one or more operational parameters associated with the transmit path, the control path comprising:

a coherent receiver configured to receive the wireless communication signal; and

a bias circuit electrically coupled to the coherent receiver and configured to generate a bias current for the coherent receiver, wherein the bias current is equal to:

a bandgap voltage supplied to the bias circuit divided by a resistance selected to approximately match a process resistance integral to the coherent receiver; minus

a temperature-dependent current multiplied by a predetermined scaling factors;

the bias current configured to bias a feedback digital-to-analog converter of the coherent receiver, such that the feedback digital-to-analog converter outputs a current proportional to the bias current.

2. A wireless communication element according to claim 1 , the temperature-dependent current including a positive current, a negative current, or a zero current.

3. A wireless communication element according to claim 1 , the temperature-dependent current equal to zero at a particular temperature.

4. A wireless communication element according to claim 3 , wherein the particular temperature is approximately equal to room temperature.

5. A wireless communication element according to claim 1 , the coherent receiver comprising:

a downconverter configured to downconvert the wireless communication signal into a downconverted signal based on an oscillator signal used to upconvert the digital signal into the wireless communication signal; and

an analog-to-digital converter configured to convert the downconverter signal into a second digital signal, the analog-to-digital converter comprising the feedback digital-to-analog converter.

6. A wireless communication element according to claim 1 , the coherent receiver having one or more elements with operational parameters that are a function of temperature.

7. A wireless communication element according to claim 1 , the predetermined scaling factor based at least on characterization of operation of the coherent receiver.

8. A method comprising:

generating a first current equal to a bandgap voltage divided by a resistance selected to approximately match a process resistance integral to a receiver;

generating a second current equal to temperature-dependent current multiplied by a predetermined scaling factor;

subtracting the second current from the first current to generate a bias current; and

providing the bias current to a feedback digital-to-analog converter of the receiver, such that the feedback digital-to-analog converter outputs a current proportional to the bias current.

9. A method according to claim 8 , the temperature-dependent current including a positive current, a negative current, or a zero current.

10. A method according to claim 8 , the temperature-dependent current equal to zero at a particular temperature.

11. A method according to claim 10 , wherein the particular temperature is approximately equal to room temperature.

12. A method according to claim 8 , wherein the feedback digital-to-analog converter is included in an analog-to-digital converter of the receiver.

13. A method according to claim 8 , the receiver having one or more elements with operational parameters that are a function of temperature.

14. A method according to claim 8 , the predetermined scaling factor based at least on characterization of operation of the receiver.

15. A bias circuit comprising:

a bias reference current portion configured to generate a first current equal to a bandgap voltage divided by a resistance selected to approximately match a process resistance integral to a receiver;

a temperature reference current portion configured to generate a second current equal to temperature-dependent current multiplied by a predetermined scaling factor, the temperature reference current portion comprising:

a current proportional to absolute temperature circuit for generating a current proportional to ambient temperature;

a temperature-independent current source for generating a temperature-independent current; and

a summer configured to subtract the temperature-independent current from the current proportional to ambient temperature in order to generate the second current; and

a mirroring portion configured to generate a bias current equal to the first current minus the second current.

16. A bias circuit according to claim 15 , the temperature-dependent current including a positive current, a negative current, or a zero current.

17. A bias circuit according to claim 15 , the temperature-dependent current equal to zero at a particular temperature.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2011
From: OLIAEI, OMID; RECTOR, STEPHEN J.; BENEVENTO, CRISTIANO
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026738/0239 →