IP Library Granted Patent US 8,466,752
Granted Patent B2
US 8,466,752 · App. 13/100,656 · Granted Jun 18, 2013

System and method for supporting different types of oscillator circuits

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Quick Facts
Patent No.
US 8,466,752
App. No.
13/100,656
Granted
Jun 18, 2013
Kind
B2
Abstract

In accordance with some embodiments of the present disclosure, an oscillator circuit comprises, a first pad associated with a first terminal of an oscillator and a second pad associated with a second terminal of the oscillator. The oscillator is configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad. The oscillator circuit further comprises an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad. The oscillator circuit also comprises a digital-to-analog converter (DAC) coupled to the first pad. The oscillator circuit additionally comprises a switching circuit coupled to the gain element. The switching circuit is configured to enable the gain element when the oscillator comprises a resonator and disable the gain element when the oscillator comprises a voltage controlled oscillating module.

Claims (59)

1. An oscillator circuit comprising:

a first pad associated with a first terminal of an oscillator;

a second pad associated with a second terminal of the oscillator, the oscillator configured generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad;

an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad, the gain element configured to control a frequency of the oscillating signal generated by the oscillator when the oscillator comprises a resonator;

a digital-to-analog converter (DAC) coupled to the first pad and configured to control the frequency of the oscillating signal when the oscillator comprises a voltage controlled oscillator module; and

a switching circuit coupled to the gain element and configured to:

enable the gain element when the oscillator comprises a resonator; and

disable the gain element when the oscillator comprises a voltage controlled oscillating module.

2. The oscillator circuit of claim 1 , the switching circuit further comprising a switch coupled between the second pad and the input node of the gain element, the switch configured to:

couple the input node of the gain element with the second pad when the oscillator comprises a resonator; and

decouple the input node of the gain element from the second pad when the oscillator comprises a voltage controlled oscillator module.

3. The oscillator circuit of claim 2 , wherein the switch comprises a transmission gate.

4. The oscillator circuit of claim 1 , the gain element further comprising a first transistor and a second transistor each coupled to the input node of the gain element and the output node of the gain element, wherein disabling the gain element comprises tying a first gate of the first transistor, a first source of the first transistor, a first drain of the first transistor, a first well of the first transistor, a second gate of the second transistor, a second source of the second transistor, a second well of the second transistor and a second drain of the second transistor such that a voltage at the first and second gates, the first and second sources, the first and second wells and the first and second drains is approximately the same.

5. The oscillator circuit of claim 1 , the DAC further configured to:

receive an enabling signal from a controller to enable the DAC when the oscillator comprises a voltage controlled oscillator module; and

receive a disabling signal from the controller to disable the DAC when the oscillator comprises a resonator.

6. The oscillator circuit of claim 1 , the switching circuit further configured to receive a control signal from a controller and enable and disable the gain element according to the received control signal.

7. The oscillator circuit of claim 1 , the DAC further configured to communicate a control voltage to the second pad, wherein the frequency of the oscillating signal is based on the control voltage when the oscillator comprises a voltage controlled oscillator module.

8. A wireless communication element, comprising:

a receive path configured to receive a first wireless communication signal and convert the first wireless communication signal into a first digital signal based at least on an oscillator signal; and

a transmit path configured to convert a second digital signal into a second wireless communication signal based at least on the oscillator signal and transmit the second wireless communication signal;

a controller; and

an oscillator circuit communicatively coupled to the controller and comprising:

a first pad associated with a first terminal of an oscillator;

a second pad associated with a second terminal of the oscillator, the oscillator configured to generate an oscillating signal and communicate the oscillating signal from the second terminal to a clock distributor coupled to the second pad;

an oscillator gain element comprising an output node coupled to the first pad and an input node coupled to the second pad, the gain element configured to control a frequency of the oscillating signal generated by the oscillator when the oscillator comprises a resonator;

a digital-to-analog converter (DAC) coupled to the first pad and configured to control the frequency of the oscillating signal when the oscillator comprises a voltage controlled oscillator module; and

a switching circuit coupled to the gain element and configured to:

enable the gain element in response to a first control signal received from the controller when the oscillator comprises a resonator; and

disable the gain element in response to a second control signal received from the controller when the oscillator comprises a voltage controlled oscillating module.

9. The wireless communication element of claim 8 , the switching circuit further comprising a switch coupled between the second pad and the input node of the gain element, the switch configured to:

couple the input node of the gain element with the second pad when the oscillator comprises a resonator; and

decouple the input node of the gain element from the second pad when the oscillator comprises a voltage controlled oscillator module.

10. The wireless communication element of claim 9 , wherein the switch comprises a transmission gate.

11. The wireless communication element of claim 8 , the gain element further comprising a first transistor and a second transistor each coupled to the input node of the gain element and the output node of the gain element, wherein disabling the gain element comprises tying a first gate of the first transistor, a first source of the first transistor, a first well of the first transistor, a first drain of the first transistor, a second gate of the second transistor, a second source of the second transistor, a second well of the second transistor and a second drain of the second transistor such that a voltage at the first and second gates, the first and second sources, the first and second wells and the first and second drains is approximately the same.

12. The wireless communication element of claim 8 , the DAC further configured to:

receive an enabling signal from a controller to enable the DAC when the oscillator comprises a voltage controlled oscillator module; and

receive a disabling signal from the controller to disable the DAC when the oscillator comprises a resonator.

13. The wireless communication element of claim 8 , the switching circuit further configured to receive a control signal from a controller and enable and disable the gain element according to the received control signal.

14. The wireless communication element of claim 8 , the DAC further configured to communicate a control voltage to the second pad, wherein the frequency of the oscillating signal is based on the control voltage when the oscillator comprises a voltage controlled oscillator module.

15. A method for configuring an oscillator circuit comprising:

enabling a gain element of an oscillator circuit when an oscillator of the oscillator circuit comprises a resonator, the gain element including:

an output node coupled to a first pad of the oscillator circuit, the first pad coupled to a first terminal of the oscillator; and

an input node coupled to a second pad of the oscillator circuit, the second pad coupled to a second terminal of the oscillator;

disabling the gain element when the oscillator comprises a voltage controlled oscillator module;

enabling a digital-to-analog converter (DAC) coupled to the first pad when the oscillator comprises a voltage controlled oscillator module; and

disabling the DAC when the oscillator comprises a resonator.

16. The method of claim 15 , further comprising:

disabling the DAC in response to initialization of the oscillator circuit;

enabling the gain element in response to initialization of the oscillator circuit;

determining whether the oscillator comprises a voltage controlled oscillator module or a resonator; and

enabling the DAC and disabling the gain element in response to determining that the oscillator comprises a voltage controlled oscillator module; and

maintaining disabling the DAC and enabling the gain element in response to determining that the oscillator comprises a resonator.

17. The method of claim 15 , further comprising:

coupling the input node of the gain element with the second pad when the oscillator comprises a resonator; and

decoupling the input node of the gain element from the second pad when the oscillator comprises a voltage controlled oscillator module.

18. The method of claim 15 , the gain element further comprising a first transistor and a second transistor each coupled to the input node of the gain element and the output node of the gain element, wherein disabling the gain element comprises tying a first gate of the first transistor, a first source of the first transistor, a first well of the first transistor, a first drain of the first transistor, a second gate of the second transistor, a second source of the second transistor, a second well of the second transistor and a second drain of the second transistor such that a voltage at the first and second gates, the first and second sources, the first and second wells and the first and second drains is approximately the same.

19. The method of claim 15 , further comprising enabling and disabling the DAC according to a signal received from a controller.

20. The method of claim 15 , further comprising enabling and disabling the gain element according to a control signal received from a controller.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2011
From: KAUFMAN, KRISTOPHER KEVIN; SIMMONS, JOHN WAYNE
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026224/0921 →