IP Library Granted Patent US 8,138,844
Granted Patent B1
US 8,138,844 · App. 12/879,525 · Granted Mar 20, 2012

System and method for crystal oscillator frequency tuning

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Quick Facts
Patent No.
US 8,138,844
App. No.
12/879,525
Granted
Mar 20, 2012
Kind
B1
Abstract

An oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, a first switched capacitor coupled to a first terminal of the crystal resonator, a second switched capacitor coupled to a second terminal of the crystal resonator, a control module configured to output a periodic dithering signal, the periodic dithering signal having a first pulse width based on a desired frequency of oscillation for the oscillator, and a delay module configured to communicate a first periodic enable signal to enable the first switched capacitor and a second periodic enable signal to enable the second switched capacitor. At least one of the first periodic enable signal and the second periodic enable signal may have a second pulse width greater than the first pulse width. The second periodic enable signal may be phase delayed relative to the first periodic enable signal by a non-zero delay.

Claims (61)

1. A wireless communication element, comprising:

at least one of:

a receive path configured to receive a first wireless communication signal and convert the first wireless communication signal into a first digital signal based at least on an oscillator signal; and

a transmit path configured to convert a second digital signal into a second wireless communication signal based at least on the oscillator signal and transmit the second wireless communication signal; and

an oscillator configured to output the oscillator signal to at least one of the receive path and the transmit path, the oscillator comprising:

a crystal resonator;

an inverter coupled in parallel with the crystal resonator;

a first switched capacitor coupled to a first terminal of the crystal resonator;

a second switched capacitor coupled to a second terminal of the crystal resonator;

a control module configured to output a periodic dithering signal, the periodic dithering signal having a first pulse width based on a desired frequency of oscillation for the oscillator; and

a delay module configured to communicate a first periodic enable signal to enable the first switched capacitor and a second periodic enable signal to enable the second switched capacitor, such that:

at least one of the first periodic enable signal and the second periodic enable signal have a second pulse width greater than the first pulse width; and

the second periodic enable signal is phase delayed relative to the first periodic enable signal by a non-zero delay.

2. A wireless communication element according to claim 1 , wherein the second pulse width is approximately two times larger than the first pulse width.

3. A wireless communication element according to claim 1 , wherein the non-zero delay is approximately equal to the first pulse width.

4. A wireless communication element according to claim 1 , wherein:

the first periodic enable signal has a second pulse width greater than the first pulse width;

the second periodic enable signal has a third pulse width greater than the first pulse width; and

the second pulse width and the third pulse width are approximately equal.

5. A wireless communication element according to claim 1 , further comprising:

the first switched capacitor coupled to the crystal resonator via a first terminal of the first switched capacitor;

the second switched capacitor coupled to the crystal resonator via a first terminal of the second switched capacitor;

a first switch coupled to a second terminal of the first capacitor via a first non-gate terminal of the first switch and coupled to ground via a second non-gate terminal of the first switch;

a second switch coupled to a second terminal of the second capacitor via a first non-gate terminal of the second switch and coupled to ground via a second non-gate terminal of the second switch; and

the delay module coupled to a gate terminal of the first switch and to a gate terminal of the second switch such that the first periodic enable signal is communicated to the gate terminal of the first switch and the second periodic enable signal is communicated to the gate terminal of the second switch.

6. A wireless communication element according to claim 5 , wherein at least one of the first switch and the second switch is a transistor.

7. A wireless communication element according to claim 1 , the control module comprising a delta-sigma modulator, wherein the delta-sigma modulator is configured to output the periodic dithering signal.

8. An oscillator, comprising:

a crystal resonator;

an inverter coupled in parallel with the crystal resonator;

a first switched capacitor coupled to a first terminal of the crystal resonator;

a second switched capacitor coupled to a second terminal of the crystal resonator;

a control module configured to output a periodic dithering signal, the periodic dithering signal having a first pulse width based on a desired frequency of oscillation for the oscillator; and

a delay module configured to communicate a first periodic enable signal to enable the first switched capacitor and a second periodic enable signal to enable the second switched capacitor, such that:

at least one of the first periodic enable signal and the second periodic enable signal have a second pulse width greater than the first pulse width; and

the second periodic enable signal is phase delayed relative to the first periodic enable signal by a non-zero delay.

9. An oscillator according to claim 8 , wherein the second pulse width is approximately two times larger than the first pulse width.

10. An oscillator according to claim 8 , wherein the non-zero delay is approximately equal to the first pulse width.

11. An oscillator according to claim 8 , wherein:

the first periodic enable signal has a second pulse width greater than the first pulse width;

the second periodic enable signal has a third pulse width greater than the first pulse width; and

the second pulse width and the third pulse width are approximately equal.

12. An oscillator according to claim 8 , further comprising:

the first switched capacitor coupled to the crystal resonator via a first terminal of the first switched capacitor;

the second switched capacitor coupled to the crystal resonator via a first terminal of the second switched capacitor;

a first switch coupled to a second terminal of the first capacitor via a first non-gate terminal of the first switch and coupled to ground via a second non-gate terminal of the first switch;

a second switch coupled to a second terminal of the second capacitor via a first non-gate terminal of the second switch and coupled to ground via a second non-gate terminal of the second switch; and

the delay module coupled to a gate terminal of the first switch and to a gate terminal of the second switch such that the first periodic enable signal is communicated to the gate terminal of the first switch and the second periodic enable signal is communicated to the gate terminal of the second switch.

13. An oscillator according to claim 12 , wherein at least one of the first switch and the second switch is a transistor.

14. An oscillator according to claim 8 , the control module comprising a delta-sigma modulator, wherein the delta-sigma modulator is configured to output the periodic dithering signal.

15. A method, comprising:

providing a periodic dithering signal, the periodic dithering signal having a first pulse width based on a desired frequency of oscillation for an oscillator;

based on the periodic dithering signal, communicating a first periodic enable signal to enable a first switched capacitor and a second periodic enable signal to enable a second switched capacitor, such that:

at least one of the first periodic enable signal and the second periodic enable signal have a second pulse width greater than the first pulse width; and

the second periodic enable signal is phase delayed relative to the first periodic enable signal by a non-zero delay.

16. A method according to claim 15 , wherein the second pulse width is approximately two times larger than the first pulse width.

17. A method according to claim 15 , wherein the non-zero delay is approximately equal to the first pulse width.

18. A method according to claim 15 , wherein:

the first periodic enable signal has a second pulse width greater than the first pulse width;

the second periodic enable signal has a third pulse width greater than the first pulse width; and

the second pulse width and the third pulse width are approximately equal.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2010
From: KAUFMAN, KRISTOPHER; SIMMONS, JOHN
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024969/0804 →