IP Library Granted Patent US 8,922,178
Granted Patent B2
US 8,922,178 · App. 12/905,241 · Granted Dec 30, 2014

Temperature dependent voltage regulator

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Quick Facts
Patent No.
US 8,922,178
App. No.
12/905,241
Granted
Dec 30, 2014
Kind
B2
Abstract

Systems and methods for reducing power consumption of a voltage regulator are disclosed. In accordance with one embodiment of the present disclosure a voltage regulator comprises an input node configured to receive a reference voltage and an output node configured to output an output voltage. The output voltage is a function of the reference voltage and a regulating current. The regulator further comprises a proportional to absolute temperature (PTAT) circuit coupled to at least one of the output node and the input node. The PTAT circuit is configured to vary at least one of the reference voltage and the regulating current as a function of temperature.

Claims (32)

1. A voltage regulator comprising:

an amplifier comprising a first input node configured to receive a reference voltage, a second input node coupled to a feedback node, and an amplifier output;

an output transistor configured to be driven by the amplifier output;

an output node coupled to a first conducting terminal of the output transistor and configured to output an output voltage;

a feedback resistor coupled between the output node and the feedback node;

a regulating transistor coupled between the feedback node and ground, the regulating transistor configured in series with the feedback resistor such that a feedback current through the feedback resistor is approximately equal to a regulating current driven by the regulating transistor; and

a proportional to absolute temperature (PTAT) circuit configured to drive the regulating transistor and to vary the regulating current and the output voltage as a function of temperature.

2. The regulator of claim 1 , the PTAT circuit configured to drive the regulating transistor such that as temperature increases the regulating current increases and as temperature decreases the regulating current decreases.

3. The regulator of claim 1 , the PTAT circuit including a current mirror comprising a first transistor and a second transistor, the PTAT circuit configured to vary the regulating current as a function of a first channel width to length ratio of the first transistor and a second channel width to length ratio of the second transistor.

4. A wireless communication element, comprising:

a receive path configured to receive a first wireless communication signal and convert the first wireless communication signal into a first digital signal;

a transmit path configured to convert a second digital signal into a second wireless communication signal and transmit the second wireless communication signal; and

a voltage regulator comprising:

an amplifier comprising a first input node configured to receive a reference voltage, a second input node coupled to a feedback node, and an amplifier output;

an output transistor configured to be driven by the amplifier output;

an output node coupled to a first conducting terminal of the output transistor and configured to output an output voltage;

a feedback resistor coupled between the output node and the feedback node;

a regulating transistor coupled between the feedback node and ground, the regulating transistor configured in series with the feedback resistor such that a feedback current through the feedback resistor is approximately equal to a regulating current driven by the regulating transistor; and

a proportional to absolute temperature (PTAT) circuit configured to vary the regulating current and the output voltage as a function of temperature.

5. The communication element of claim 4 , the PTAT circuit configured to drive the regulating transistor such that as temperature increases the regulating current increases and as temperature decreases the regulating current decreases.

6. The communication element of claim 4 , the PTAT circuit including a current mirror comprising a first transistor and a second transistor, the PTAT circuit configured to vary the regulating current as a function of a first channel width to length ratio of the first transistor and a second channel width to length ratio of the second transistor.

7. A method comprising:

receiving, by a voltage regulator, a reference voltage at a first amplifier input node;

receiving a feedback signal at a second amplifier input node coupled to a feedback node;

driving an output transistor coupled to an amplifier output;

outputting, by the voltage regulator, an output voltage at an output node coupled to a first conducting terminal of the output transistor;

providing the feedback signal to the second amplifier input node through a feedback resistor coupled between the output node and the feedback node;

providing a regulating current at the feedback node with a regulating transistor coupled in series with the feedback resistor such that a feedback current through the feedback resistor is approximately equal to the regulating current through the regulating transistor;

driving the regulating transistor with a proportional to absolute temperature (PTAT) circuit;

varying, by the PTAT circuit driving the regulating transistor, the regulating current and the output voltage as a function of temperature.

8. The method of claim 7 , further comprising increasing the regulating current as temperature increases and decreasing the regulating current as temperature decreases.

9. The method of claim 7 , further comprising varying the regulating current as a function of a first channel width to length ratio of a first transistor of the PTAT circuit and a second channel width to length ratio of a second transistor of the PTAT circuit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →