IP Library Granted Patent US 8,427,237
Granted Patent B2
US 8,427,237 · App. 13/078,430 · Granted Apr 23, 2013

Common-mode feedback circuit

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Quick Facts
Patent No.
US 8,427,237
App. No.
13/078,430
Granted
Apr 23, 2013
Kind
B2
Abstract

A differential amplifier circuit with common-mode feedback is disclosed. The amplifier may include a first stage comprising a first differential input configured to drive a first differential pair transistor in a first differential current path, a second differential input configured to drive a second differential pair transistor in a second differential current path, a first differential output, and a second differential output, a second stage comprising a first differential input, a second differential input, a first differential output, and a second differential output, a common-mode feedback circuit, a first conducting element in a first common-mode current path parallel to the first differential current path and comprising a first conducting terminal coupled to the first differential output of the first stage, and a second conducting element in a second common-mode current path parallel to the second differential current path and comprising a first conducting terminal coupled to the second differential output of the first stage.

Claims (29)

1. A differential amplifier circuit with common-mode feedback comprising:

a first stage comprising a first differential input configured to drive a first differential pair transistor in a first differential current path, a second differential input configured to drive a second differential pair transistor in a second differential current path, a first differential output, and a second differential output;

a second stage comprising a first differential input, a second differential input, a first differential output, and a second differential output; and

a common-mode feedback circuit configured to continuously drive a first conducting element in a conductive state and a second conducting element in a conductive state, the first conducting element in a first common-mode feedback current path parallel to the first differential current path and comprising a first conducting terminal coupled to the first differential output of the first stage, the second conducting element in a second common-mode feedback current path parallel to the second differential current path and comprising a first conducting terminal coupled to the second differential output of the first stage.

2. The amplifier of claim 1 , wherein:

the first conducting element comprises a second conducting terminal coupled to a high potential power supply; and

the second conducting element comprises a second conducting terminal coupled to a high potential power supply.

3. The amplifier of claim 2 , wherein the first conducting element comprises a PMOS transistor and the second conducting element comprises a PMOS transistor.

4. The amplifier of claim 2 , wherein the second stage comprises:

a first NMOS transistor comprising a gate configured to be driven by the first input of the second stage; and

a second NMOS transistor comprising a gate configured to be driven by the second input of the second stage.

5. The amplifier of claim 1 , wherein:

the first conducting element comprises a second conducting terminal coupled to a low potential power supply; and

the second conducting element comprises a second conducting terminal coupled to a low potential power supply.

6. The amplifier of claim 5 , wherein the first conducting element comprises a first NMOS transistor and the second conducting element comprises a first NMOS transistor.

7. The amplifier of claim 5 , wherein the second stage comprises:

a first PMOS transistor comprising a gate configured to be driven by the first input of the second stage; and

a second PMOS transistor comprising a gate configured to be driven by the second input of the second stage.

8. A method for providing common-mode feedback in a multi-stage amplifier, comprising:

generating a common-mode feedback signal based on a reference voltage and a common-mode value of a first differential output and a second differential output of an amplifier; and

driving continuously a first conducting element in a conductive state and a second conducting element in a conductive state with the common-mode feedback signal, the first conducting element in a first common-mode feedback current path parallel to a first differential current path in a first stage and comprising a first conducting terminal coupled to a first differential output of the first stage, the second conducting element in a second common-mode feedback current path parallel to a second differential current path in the first stage and comprising a first conducting terminal coupled to a second differential output of the first stage.

9. The method of claim 8 , wherein:

the first conducting element comprises a second conducting terminal coupled to a high potential power supply; and

the second conducting element comprises a second conducting terminal coupled to a high potential power supply.

10. The method of claim 9 , wherein the first conducting element comprises a PMOS transistor and the second conducting element comprises a PMOS transistor.

11. The method of claim 8 , wherein:

the first conducting element comprises a second conducting terminal coupled to a low potential power supply; and

the second conducting element comprises a second conducting terminal coupled to a low potential power supply.

12. The method of claim 11 , wherein the first conducting element comprises a first NMOS transistor and the second conducting element comprises a first NMOS transistor.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053062/0703 →
CONFIRMATORY ASSIGNMENT Recorded Jun 25, 2020
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 053066/0388 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2011
From: HONG, MERIT
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 026062/0320 →