IP Library Assignment 026160/0456
Patent Assignment
Reel/Frame 026160/0456

Assignment of Assignor's Interest

Recorded: 2011-04-21 Pages: 3
Assignors
MUKHERJEE, NILOY
Executed: 2011-02-07
DEWEY, GILBERT
Executed: 2011-02-07
RADOSAVLJEVIC, MARKO
Executed: 2011-02-07
CHAU, ROBERT S.
Executed: 2011-02-07
METZ, MATTHEW V.
Executed: 2011-02-07
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BLVD., SANTA CLARA, CALIFORNIA, 95052
Covered Property (1)
Method to Reduce Contact Resistance of N-Channel Transistors by Using a Iii-V Semiconductor Interlayer in Source and Drain
Patent: 8,415,751 →
Application: 12/982,083 →
Publication: US 2012/0168877