IP Library Assignment 026175/0549
Patent Assignment
Reel/Frame 026175/0549

Assignment of Assignor's Interest

Recorded: 2011-04-25 Pages: 5
Assignors
PARTHASARATHY, SIVAGNANAM
Executed: 2011-04-19
HUANG, LUN BIN
Executed: 2011-04-13
RISSO, ALESSANDRO
Executed: 2011-04-14
Assignee
STMICROELECTRONICS, INC.
750 CANYON DRIVE, SUITE 300, MAIL STATION 2346, COPPELL, TEXAS, 75019
Covered Property (1)
Max-log-map equivalence log likelihood ratio generation soft Viterbi architecture system and method
Patent: 8,694,877 →
Application: 12/924,707 →
Publication: US 2011/0197112