Patent Assignment
Reel/Frame 026256/0432
Assignment of Assignor's Interest
Recorded: 2011-05-11
Pages: 3
Assignor
HSU, JEN-SHOU
Executed: 2011-04-25
Assignee
ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC.
NO.23, INDUSTRY E. RD., IV, SCIENCE-BASED INDUSTRIAL PARK,, HSINCHU, 300, TAIWAN
Covered Property
(1)
Delay Line Circuit and Phase Interpolation Module Thereof