Patent Assignment
Reel/Frame 026384/0855
Assignment of Assignor's Interest
Recorded: 2011-06-03
Pages: 10
Assignor
RENESAS ELECTRONICS CORPORATION
Executed: 2011-05-27
Assignee
ADVANCED PROCESSOR TECHNOLOGIES LLC
6136 FRISCO SQUARE BLVD., SUITE 385, FRISCO, TEXAS, 75034
Covered Properties
(43)
Method and System for Invalidating Instructions Utilizing Validity and Write Delay Flags in Parallel Processing Apparatus
Application:
07/777,698 →
Microprocessor and Data Flow Microprocessor Having Vector Operation Function
Patent:
5,404,553 →
Application:
07/819,164 →
Microprocessor Including System for Pipeline Processing of Multi- Functional Instructions
Application:
07/819,892 →
Branching System for Return from Subroutine Using Targer Address in Return Buffer Accessed Based on Branch Type Information in Bht
Patent:
5,454,087 →
Application:
07/965,441 →
Data Processor Calculating Branch Target Address of a Branch Instruction in Parallel with Decoding of the Instruction
Patent:
5,485,587 →
Application:
08/010,085 →
Multiprocessor-Type One-Chip Microcomputer with Dual-Mode Functional Terminals
Patent:
5,506,994 →
Application:
08/049,720 →
Method and System for Invalidating Instructions Utilizing Validity and Write Delay Flags in Parallel Processing Apparatus
Patent:
5,522,084 →
Application:
08/310,508 →
Data Processor
Application:
08/316,464 →
One-Chip Microcomputer and Program Development/Evaluation System Therefor
Patent:
5,574,932 →
Application:
08/318,455 →
Multiprocessor Including System for Pipeline Processing of Multi-Functional Instructions
Patent:
5,421,029 →
Application:
08/319,341 →
Microprocessor and Data Flow Microprocessor Having Vector Operation Function
Patent:
5,666,535 →
Application:
08/330,880 →
Emulator Probe
Patent:
5,571,021 →
Application:
08/422,902 →
A Single-Chip Data Processor Handling Synchronous and Asynchronous Execeptions by Branching from a First Exception Handler to a Second Ex Ception Handler
Patent:
6,038,661 →
Application:
08/524,712 →
A Real Time Debugger for a Microcomputer
Patent:
6,185,731 →
Application:
08/526,476 →
Data Processor with Branch Target Address Generating Unit
Patent:
5,848,268 →
Application:
08/535,870 →
Data Processor Generating Jump Target Address of a Jump Instruction in Parallel with Decoding of the Instruction
Patent:
5,617,550 →
Application:
08/535,871 →
A Data Processor Processing a Jump Instruction
Patent:
5,592,637 →
Application:
08/537,000 →
Data Processor Processing a Jump Instruction
Patent:
5,649,145 →
Application:
08/537,001 →
Data Processor Processing a Jump Instruction
Patent:
5,590,296 →
Application:
08/537,046 →
Data Processor Capable of Executing Two Instructions Having Operand Interference at High Speed in Parallel
Patent:
6,178,492 →
Application:
08/555,425 →
Semiconductor Device Capable of Concurrently Transferring Data Over Read Paths and Write Paths to a Memory Cell Array
Patent:
5,657,273 →
Application:
08/558,778 →
Moving Picture Decoding Circuit
Patent:
5,699,117 →
Application:
08/601,273 →
Data Processor with Cache Memory
Patent:
5,708,803 →
Application:
08/689,115 →
System for Maintaining Fixed-Point Data Alignment Within a Combination Cpu and Dsp System
Patent:
5,884,092 →
Application:
08/725,481 →
Microcomputer
Patent:
5,901,283 →
Application:
08/790,264 →
Semiconductor Device
Patent:
5,835,417 →
Application:
08/831,743 →
Microcomputer with Built-in Flash Memory
Patent:
5,923,838 →
Application:
08/835,361 →
Analog-To-Digital Converter for Both M-Bit and N-Bit Analog Conversion
Patent:
5,898,396 →
Application:
08/949,926 →
Data Processor and Data Processing System Having Two Translation Lookaside Buffers
Patent:
6,092,172 →
Application:
08/950,668 →
Microcomputer and Multi-Chip Module
Patent:
5,907,507 →
Application:
08/975,204 →
Data Processing Device Having Accelerator for Digital Signal Processing
Patent:
5,987,556 →
Application:
09/092,940 →
Data Processor
Patent:
6,112,289 →
Application:
09/143,530 →
Semiconductor Device
Patent:
6,111,793 →
Application:
09/158,551 →
Multiprocessor System Capable of Circumventing Write Monitoring of Cache Memories
Patent:
6,253,290 →
Application:
09/247,519 →
Method for Loading Instructions or Data into a Locked Way of a Cache Memory
Patent:
6,629,207 →
Application:
09/410,693 →
Dma Handshake Protocol
Patent:
6,701,405 →
Application:
09/410,927 →
Accessing Exception Handlers Without Translating the Address
Data Proecssor and Data Processor System Having Multiple Modes of Address Indexing and Operation
Patent:
6,532,528 →
Application:
09/563,753 →
Microcomputer Having on-Screen Display
Patent:
6,611,270 →
Application:
09/587,884 →
Semiconductor device
Patent:
6,195,294 →
Application:
09/614,759 →
Semiconductor Device
Data Processing Device Having a Central Processing Unit and Digital Signal Processing Unit
A Data Processing Device Having a Central Processing Unit and Digital Signal Processing Unit
Related Assignments
(2)
Other recorded transfers of the patents in this record — the chain of ownership.