IP Library Assignment 026529/0133
Patent Assignment
Reel/Frame 026529/0133

Assignment of Assignor's Interest

Recorded: 2011-06-30 Pages: 2
Assignor
JUNG, JIN-KI
Executed: 2008-05-29
Assignee
HYNIX SEMICONDUCTOR INC.
SAN 136-1, AMI-RI, BUBAL-EUB, ICHON-SHI, KYOUNGKI-DO, 467-860, KOREA, REPUBLIC OF
Covered Property (1)
Mask Layout and Method for Forming Vertical Channel Transistor in Semiconductor Device Using the Same
Patent: 8,440,536 →
Application: 13/173,389 →
Publication: US 2011/0256354