IP Library Assignment 027067/0163
Patent Assignment
Reel/Frame 027067/0163

Assignment of Assignor's Interest

Recorded: 2011-10-14 Pages: 4
Assignors
WANG, CHUNG-HSING
Executed: 2008-06-10
TSAI, CHIH SHENG
Executed: 2008-06-10
LIU, YING-LIN
Executed: 2008-06-10
LIN, KAI-YUN
Executed: 2008-06-10
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., ("TSMC")
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property (1)
Design and Verification of 3D Integrated Circuits
Patent: 8,359,554 →
Application: 13/274,091 →
Publication: US 2012/0036489