IP Library Assignment 027461/0240
Patent Assignment
Reel/Frame 027461/0240

Assignment of Assignor's Interest

Recorded: 2011-12-30 Pages: 5
Assignors
GUPTA, NAVNEET
Executed: 2011-12-22
DUBEY, PRASHANT
Executed: 2011-12-22
SAHA, KAUSHIK
Executed: 2011-12-22
KASHYAP, ATULKUMAR
Executed: 2011-12-22
Assignee
STMICROELECTRONICS PVT. LTD.
PLOT N. 1, KNOWLEDGE PARK III, GREATER NOIDA, 201308, INDIA
Covered Property (1)
An Apparatus Having Error Detection in Sequential Logic
Patent: 8,624,623 →
Application: 13/340,674 →
Publication: US 2013/0169360
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Dec 3, 2013
From: STMICROELECTRONICS PVT. LTD.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 031703/0429 →
Assignment of Assignor's Interest Jun 23, 2016
From: STMICROELECTRONICS INTERNATIONAL NV
To: FRANCE BREVETS
Reel/Frame 039140/0584 →
Assignment of Assignor's Interest May 23, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060161/0346 →
Corrective Assignment to Correct the the Assignee Address Previously Recorded at Reel: 060161 Frame: 0346. Assignor(S) Hereby Confirms the Assignment. Jun 16, 2022
From: FRANCE BREVETS
To: MICROELECTRONIC INNOVATIONS, LLC
Reel/Frame 060389/0768 →