Assignment of Assignor's Interest

Recorded: 2012-03-14 Pages: 4

Assignor

ALTOS DESIGN AUTOMATION, INC.

Executed: 2012-03-14

Assignee

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE, SAN JOSE, CALIFORNIA, 94303

Covered Properties (4)

Systems and Methods of Efficient Library Characterization for Integrated Circuit Cell Libraries

Patent: 7,937,256 →

Application: 11/943,529 →

Publication: US 2008/0133202

Systems and Methods of Efficient Library Characterization for Integrated Circuit Cell Libraries

Patent: 8,160,858 →

Application: 12/970,912 →

Publication: US 2011/0087478

Statistical library characterization method for the creation of integrated circuit electrical models

Application: 60/868,334 →

Library characterization method with consideration for process variation

Application: 60/971,022 →

Related Assignments (2)

Other recorded transfers of the patents in this record — the chain of ownership.