IP Library Assignment 030421/0434
Patent Assignment
Reel/Frame 030421/0434

Assignment of Assignor's Interest

Recorded: 2013-05-15 Pages: 2
Assignors
REY, CLAUDIO
Executed: 2013-05-14
HARNISHFEGER, DAVID
Executed: 2013-05-14
Assignee
FUJITSU SEMICONDUCTOR LIMITED
2-10-23 SHIN-YOKOHAMA, KOHOKU-KU, YOKOHAMA-SHI, KANAGAWA, 222-0033, JAPAN
Covered Property (1)
Reducing Settling Time in Phase-Locked Loops
Patent: 8,885,788 →
Application: 13/895,139 →
Publication: US 2014/0340131
Related Assignments (3)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 15, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
Reel/Frame 030793/0586 →
Assignment of Assignor's Interest Aug 28, 2013
From: FUJITSU SEMICONDUCTOR WIRELESS PRODUCTS, INC.
To: INTEL IP CORPORATION
Reel/Frame 031105/0416 →
Assignment of Assignor's Interest Jun 28, 2021
From: INTEL IP CORPORATION
To: INTEL CORPORATION
Reel/Frame 056701/0807 →