Patent Assignment
Reel/Frame 030488/0799
Merger
Recorded: 2013-05-27
Received: 2013-05-27
Pages: 10
Assignor
FRONTENAC VENTURES LLC
Executed: 2013-02-12
Assignee
INTELLECTUAL VENTURES I LLC
2711 CENTERVILLE RD, SUITE 400, WILMINGTON, DE, 19808, UNITED STATES
Covered Properties
(8)
Structure and Method for Parallel Testing of Dies on a Semiconductor Wafer
Application:
11/614,241 →
Structure and Method for Parallel Testing of Dies on a Semiconductor Wafer
Application:
11/614,252 →
Structure and Method for Parallel Testing of Dies on a Semiconductor Wafer
Application:
10/340,558 →
Integrated Circuit Having an Eeprom and Flash Eprom Using a Memory Cell with Source-Side Programming
Application:
10/100,508 →
Integrated Circuit Having an Eeprom and Flash Eprom
Application:
10/099,291 →
Non-Volatile Memory Architecture and Method of Operation
Application:
09/938,266 →
Testing Dies on a Semiconductor Wafer in a Sequential and Overlapping Manner
Application:
09/930,011 →
A Structure and Method of Operating an Array of Non-Volatile Memory Cell with Souce-Side Programming
Application:
09/757,088 →