IP Library Assignment 030495/0412
Patent Assignment
Reel/Frame 030495/0412

Assignment of Assignor's Interest

Recorded: 2013-05-28 Pages: 5
Assignors
VRUDHULA, SARMA
Executed: 2013-05-27
KULKARNI, NIRANJAN
Executed: 2013-05-27
Assignee
Covered Property (1)
Technology Mapping for Threshold and Logic Gate Hybrid Circuits
Patent: 8,832,614 →
Application: 13/903,424 →
Publication: US 2013/0339914
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Confirmatory License Apr 1, 2019
From: ARIZONA STATE UNIVERSITY, TEMPE
To: NATIONAL SCIENCE FOUNDATION
Reel/Frame 048759/0486 →