Patent Assignment
Reel/Frame 030677/0449
Assignment of Assignor's Interest
Recorded: 2013-06-25
Pages: 7
Assignors
CHEN, CHIH-MING
Executed: 2013-06-24
WANG, SZU-YU
Executed: 2013-06-21
YU, CHUNG-YI
Executed: 2013-06-21
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Integrated Circuit with Backside Structures to Reduce Substrate Warp