Patent Assignment
Reel/Frame 031133/0536
Assignment of Assignor's Interest
Recorded: 2013-09-04
Pages: 5
Assignors
SHIEH, MING-FENG
Executed: 2013-08-16
LIU, RU-GUN
Executed: 2013-08-16
HSIEH, HUNG-CHANG
Executed: 2013-08-16
GAU, TSAI-SHENG
Executed: 2013-08-16
KU, YAO-CHING
Executed: 2013-08-16
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Integrated Circuit Layout and Method with Double Patterning