IP Library Assignment 031197/0752
Patent Assignment
Reel/Frame 031197/0752

Assignment of Assignor's Interest

Recorded: 2013-09-12 Pages: 8
Assignors
RADHAKRISHNAN, SIVAKUMAR
Executed: 2011-10-19
SCHMISSEUR, MARK A.
Executed: 2011-10-12
TAN, SIN S.
Executed: 2011-10-19
HAREN, KENNETH C.
Executed: 2011-10-19
BROWN, THOMAS C.
Executed: 2011-10-19
KUMAR, PANKAJ
Executed: 2013-09-11
GOPAL, VINODH
Executed: 2011-10-13
FEGHALI, WAJDI K.
Executed: 2011-10-13
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Efficient and Scalable Cyclic Redundancy Check Circuit Using Galois-Field Arithmetic
Patent: 8,607,129 →
Application: 13/175,500 →
Publication: US 2013/0007573
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 18, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072890/0186 →