IP Library Assignment 032894/0497
Patent Assignment
Reel/Frame 032894/0497

Assignment of Assignor's Interest

Recorded: 2014-05-15 Pages: 5
Assignors
LIU, CHI-LIN
Executed: 2014-05-12
HSIEH, SHANG-CHIH
Executed: 2014-05-12
LU, LEE-CHUNG
Executed: 2014-05-13
WANG, MENG-HSUEH
Executed: 2014-05-12
WU, CHANG-YU
Executed: 2014-05-12
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN ROAD 6, HSINCHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property (1)
Low-Power Internal Clock Gated Cell and Method
Patent: 9,203,405 →
Application: 14/277,896 →
Publication: US 2015/0162910