Patent Assignment
Reel/Frame 033032/0656
Assignment of Assignor's Interest
Recorded: 2014-06-05
Pages: 8
Assignors
CHUANG, HARRY-HAK-LAY
Executed: 2014-05-27
WU, WEI CHENG
Executed: 2014-05-27
KAO, YA-CHEN
Executed: 2014-05-27
CHU, FANG-LAN
Executed: 2014-05-27
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSIN-CHU SCIENCE PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Dual Silicide Formation Method to Embed Split Gate Flash Memory in High-K Metal Gate (Hkmg) Technology