Patent Assignment
Reel/Frame 033575/0797
Assignment of Assignor's Interest
Recorded: 2014-08-20
Pages: 2
Assignors
CHIANG, TING-WEI
Executed: 2014-08-04
ZHUANG, HUI-ZHONG
Executed: 2014-08-04
TIEN, LI-CHUN
Executed: 2014-08-12
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. VI, HSINCHU SCIENCE PARK, HSINCHU, 300, TAIWAN
Covered Property
(1)
System and Method of Layout Design for Integrated Circuits