Patent Assignment
Reel/Frame 034726/0353
Assignment of Assignor's Interest
Recorded: 2015-01-15
Pages: 6
Assignors
YOSHINAGA, MITSUNOBU
Executed: 2014-10-10
OI, TADASHI
Executed: 2014-10-10
TSUDAKA, SHINICHIRO
Executed: 2014-10-10
NAKAGAWA, MASAYO
Executed: 2014-10-10
Assignee
MITSUBISHI ELECTRIC CORPORATION
7-3, MARUNOUCHI 2-CHOME, CHIYODA-KU, TOKYO, 100-8310, JAPAN
Covered Property
(1)
Device for and Method of Estimating Error Point in Logic Diagram