IP Library Assignment 034776/0363
Patent Assignment
Reel/Frame 034776/0363

Assignment of Assignor's Interest

Recorded: 2015-01-21 Pages: 60
Assignor
LSI CORPORATION
Executed: 2014-09-02
Assignee
SEAGATE TECHNOLOGY LLC
10200 S. DE ANZA BLVD., CUPERTINO, CALIFORNIA, 95014
Covered Properties (25)
System, Method, and Computer Program Product for Sending Logical Block Address De-Allocation Status Information
Patent: 8,230,159 →
Application: 12/413,312 →
Publication: US 2010/0250829
System, Method, and Computer Program Product for Inserting a Gap in Information Sent from a Drive to a Host Device
Patent: 8,140,712 →
Application: 12/505,333 →
Publication: US 2011/0016233
System, Method, and Computer Program Product for Reducing a Rate of Data Transfer to at Least a Portion of Memory
Patent: 8,516,166 →
Application: 12/506,068 →
Publication: US 2011/0016239
System, Method, and Computer Program Product for Sending Failure Information from a Serial Ata (Sata) Solid State Drive (Ssd) to a Host Device
Patent: 8,108,737 →
Application: 12/573,792 →
Publication: US 2011/0083047
Techniques for Multi-Memory Device Lifetime Management
Patent: 8,230,164 →
Application: 12/822,442 →
Publication: US 2011/0125956
Techniques for Prolonging a Lifetime of Memory by Controlling Operations That Affect the Lifetime of the Memory
Patent: 8,230,183 →
Application: 12/843,851 →
Publication: US 2011/0167199
Techniques for Writing Data to Different Portions of Storage Devices Based on Write Frequency
Patent: 8,230,184 →
Application: 12/956,926 →
Publication: US 2011/0276745
Techniques for Reducing Memory Write Operations Using Coalescing Memory Buffers and Difference Information
Patent: 8,402,184 →
Application: 13/042,231 →
Publication: US 2012/0054415
Reducing Writes, and Estimating and Displaying Estimated Remaining Lifetime of Non-Volatile Memories
Patent: 8,171,356 →
Application: 13/042,237 →
Publication: US 2012/0060001
Techiniques for Increasing a Lifetime of Blocks of Memory
Patent: 8,339,881 →
Application: 13/042,242 →
Publication: US 2012/0060060
Techniques for Providing Data Redundancy After Reducing Memory Writes
Patent: 8,504,783 →
Application: 13/042,252 →
Publication: US 2012/0060002
Storage System Logical Block Address De-Allocation Management
Patent: 8,671,258 →
Application: 13/260,709 →
Publication: US 2012/0084492
Cross-Decoding for Non-Volatile Storage
Patent: 8,719,663 →
Application: 13/323,769 →
Publication: US 2012/0151286
Sending Failure Information from a Solid State Drive (Ssd) to a Host Device
Patent: 8,453,018 →
Application: 13/361,654 →
Publication: US 2012/0304027
System, Method, and Computer Program Product for Inserting a Gap in Information Sent from a Drive to a Host Device
Patent: 8,423,680 →
Application: 13/423,808 →
Publication: US 2013/0019031
Zero-One Balance Management in a Solid-State Disk Controller
Patent: 8,839,073 →
Application: 13/464,433 →
Publication: US 2013/0297986
Techniques for Increasing a Lifetime of Blocks of Memory
Patent: 8,531,900 →
Application: 13/572,257 →
Publication: US 2012/0311378
Scalable Storage Devices
Patent: 8,677,068 →
Application: 13/702,976 →
Publication: US 2013/0086336
Storage System Data Hardening
Patent: 8,671,259 →
Application: 13/732,318 →
Publication: US 2013/0124777
Techniques for Reducing Memory Write Operations Using Coalescing Memory Buffers and Difference Information
Patent: 8,671,233 →
Application: 13/840,609 →
Publication: US 2013/0212322
System, Method, and Computer Program Product for Inserting a Gap in Information Sent from a Drive to a Host Device
Patent: 8,615,609 →
Application: 13/858,064 →
Publication: US 2013/0227174
Sending Failure Information from a Solid State Drive (Ssd) to a Host Device
Patent: 8,782,473 →
Application: 13/899,780 →
Publication: US 2013/0254597
Techniques for Providing Data Redundancy After Reducing Memory Writes
Patent: 8,725,960 →
Application: 13/943,446 →
Publication: US 2013/0304976
Techniques for Increasing a Lifetime of Blocks of Memory
Patent: 8,699,287 →
Application: 13/962,779 →
Publication: US 2013/0326130
Higher-Level Redundancy Information Computation
Patent: 8,656,101 →
Application: 13/979,805 →
Publication: US 2013/0290618
Related Assignments (13)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Mar 27, 2009
From: STENFORT, ROSS JOHN
To: SANDFORCE, INC.
Reel/Frame 022471/0589 →
Assignment of Assignor's Interest Jul 17, 2009
From: STENFORT, ROSS JOHN
To: SANDFORCE, INC.
Reel/Frame 022977/0749 →
Assignment of Assignor's Interest Jul 20, 2009
From: STENFORT, ROSS JOHN
To: SANDFORCE, INC.
Reel/Frame 022983/0162 →
Assignment of Assignor's Interest Oct 5, 2009
From: STENFORT, ROSS JOHN
To: SANDFORCE, INC.
Reel/Frame 023329/0081 →
Assignment of Assignor's Interest Dec 16, 2011
From: STENFORT, ROSS JOHN
To: SANDFORCE, INC.
Reel/Frame 027397/0584 →
Assignment of Assignor's Interest Jan 3, 2012
From: LI, YAN; ZHONG, HAO
To: SANDFORCE, INC.
Reel/Frame 027470/0169 →
Assignment of Assignor's Interest Jun 22, 2012
From: SANDFORCE, INC.
To: LSI CORPORATION
Reel/Frame 028427/0932 →
Assignment of Assignor's Interest Sep 11, 2012
From: SANDFORCE, INC.
To: LSI CORPORATION
Reel/Frame 028938/0413 →
Assignment of Assignor's Interest Jan 24, 2013
From: COHEN, EARL T.
To: LSI CORPORATION
Reel/Frame 029690/0259 →
Assignment of Assignor's Interest Jan 24, 2013
From: SANDFORCE, INC.
To: LSI CORPORATION
Reel/Frame 029689/0926 →
Patent Security Agreement May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
Termination and Release of Security Interest in Certain Patents Included in Security Interest Previously Recorded at Reel/Frame (032856/0031) Nov 6, 2014
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 034177/0257 →
Termination and Release of Security Interest in Patent Rights (Releases Rf 032856-0031) Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →