Patent Assignment
Reel/Frame 035496/0580
Assignment of Assignor's Interest
Recorded: 2015-04-27
Pages: 6
Assignors
SHIN, MIN CHEOL
Executed: 2015-02-05
LEE, JAE HYUN
Executed: 2015-02-05
KANG, DOO HYUNG
Executed: 2015-02-05
SEO, JUN BEOM
Executed: 2015-02-05
JEONG, WOO JIN
Executed: 2015-02-05
Assignee
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
373-1 GUSEONG-DONG, YUSEONG-GU, DAEJEON, 305-701, KOREA, REPUBLIC OF
Covered Property
(1)
Negative Capacitance Logic Device, Clock Generator Including the Same and Method of Operating Clock Generator