Patent Assignment
Reel/Frame 036025/0453
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2015-06-29
Received: 2015-06-29
Pages: 153
Assignor
SPANSION, LLC
Executed: 2015-06-01
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications
(28)
SERVO CONTROLLER AND SERVO CONTROL METHOD
App. No. 10/187,944
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 10/103,721
→
NEGATIVE PUMP REGULATOR USING MOS CAPACITOR
App. No. 10/050,254
→
SOURCE SIDE SENSING SCHEME FOR VIRTUAL GROUND READ OF FLASH EPROM ARRAY WITH ADJACENT BIT PRECHARGE
App. No. 10/050,257
→
METHOD AND APPARATUS FOR SOFT PROGRAM VERIFICATION IN A MEMORY DEVICE
App. No. 10/050,650
→
METHOD OF MANUFACTURING HIGH VOLTAGE TRANSISTOR WITH MODIFIED FIELD IMPLANT MASK
App. No. 10/044,510
→
METHOD AND APPARATUS FOR ADJUSTING ON-CHIP CURRENT REFERENCE FOR EEPROM SENSING
App. No. 10/010,985
→
DRAIN SIDE SENSING SCHEME FOR VIRTUAL GROUND FLASH EPROM ARRAY WITH ADJACENT BIT CHARGE AND HOLD
App. No. 09/999,869
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FORMATION OF STI (SHALLOW TRENCH ISOLATION) STRUCTURES WITHIN CORE AND PERIPHERY AREAS OF FLASH MEMORY DEVICE
App. No. 09/969,573
→
DECODER APPARATUS AND METHODS FOR PRE-CHARGING BIT LINES
App. No. 09/928,059
→
LOW DEFECT DENSITY PROCESS FOR DEEP SUB-0.18UM FLASH MEMORY TECHNOLOGIES
App. No. 09/917,182
→
NOR ARRAY WITH BURIED TRENCH SOURCE LINE
App. No. 09/917,178
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VOLTAGE BOOST CIRCUIT USING SUPPLY VOLTAGE DETECTION TO COMPENSATE FOR SUPPLY VOLTAGE VARIATIONS IN READ MODE VOLTAGES
App. No. 09/915,018
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MIXED MODE MULTI LEVEL MODE INDICTOR
App. No. 09/905,421
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USING HOT CARRIER INJECTION TO CONTROL OVER-PROGRAMMING IN A NON-VOLATILE MEMORY CELL HAVING AN OXIDE-NITRIDE-OXIDE (ONO) STRUCTURE
App. No. 09/902,332
→
HIGH DENSITY FLASH EEPROM ARRAY WITH SOURCE SIDE INJECTION
App. No. 09/892,685
→
ERASE METHOD FOR DUAL BIT VIRTUAL GROUND FLASH
App. No. 09/886,861
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METHOD AND SYSTEM FOR QUALIFYING AN ONO LAYER IN A SEMICONDUCTOR DEVICE
App. No. 09/875,073
→
METHOD AND APPARATUS FOR BOOSTING BITLINES FOR LOW VCC READ
App. No. 09/873,643
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METHOD OF CHANNEL HOT ELECTRON PROGRAMMING FOR SHORT CHANNEL NOR FLASH ARRAYS
App. No. 09/861,031
→
SHARED MEMORY APPARATUS AND METHOD FOR MULTIPROCESSOR SYSTEMS
App. No. 09/854,351
→
METHOD FOR FORMING SELF-ALIGNED CONTACTS USING CONSUMABLE SPACERS
App. No. 09/850,484
→
METHOD AND SYSTEM FOR REDUCING THINNING OF FIELD ISOLATION STRUCTURES IN A FLASH MEMORY DEVICE
App. No. 09/844,692
→
PLL FREQUENCY SYNTHESIZER CIRCUIT
App. No. 09/809,221
→
FRACTIONAL-N-PILL FREQUENCY SYNTHESIZER AND PHASE ERROR CANCELING METHOD THEREFOR
App. No. 09/809,208
→
HIGH VOLTAGE OXIDATION METHOD FOR HIGHLY RELIABLE FLASH MEMORY DEVICES
App. No. 09/803,400
→
PROCESS FOR FABRICATING A NON-VOLATILE MEMORY DEVICE
App. No. 09/798,667
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STAIRCASE PROGRAM VERIFY FOR MULTI-LEVEL CELL FLASH MEMORY DESIGNS
App. No. 09/794,482
→