Patent Assignment
Reel/Frame 036098/0375
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2015-07-15
Received: 2015-07-15
Pages: 9
Assignor
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE, LTD.
Executed: 2015-06-24
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BLVD., SANTA CLARA, CA, 95054, UNITED STATES
Covered Applications
(19)
Digital Processor Having Instruction Set with Complex Angle Function
App. No. 14/255,491
→
Modeling of a Target Volterra Series Using an Orthogonal Parallel Wiener Decomposition
App. No. 14/255,499
→
Modeling of a Physical System Using Two-Dimensional Look-Up Table and Linear Interpolation
App. No. 14/230,607
→
Non-Linear Modeling of a Physical System Using Look-Up Table with Polynomial Interpolation
App. No. 14/230,622
→
NON-LINEAR INTERFERENCE CANCELLATION FOR WIRELESS TRANSCEIVERS
App. No. 14/230,635
→
Non-Linear Modeling of a Physical System Using Direct Optimization of Look-Up Table Values
App. No. 14/168,621
→
Vector Processor Having Instruction Set With Sliding Window Non-Linear Convolutional Function
App. No. 14/168,615
→
Multi-Threaded DFA Architecture
App. No. 61/524,390
→
Begin Anchor Annotation in DFAs
App. No. 61/524,394
→
Packet Processing in a Network Processor
App. No. 61/426,857
→
Time Synchronizing using IEEE1588 and Synchronous Ethernet in a Time-setting Mode of Operation
App. No. 61/326,471
→
ADVANCED COMMUNICATIONS PROCESSOR ARCHITECTURE
App. No. 61/179,202
→
STATE MACHINE INSTRUCTION MEMORY COMPRESSION
App. No. 60/948,402
→
HARDWARE PROCESSING OF REGULAR EXPRESSIONS
App. No. 60/915,055
→
Parallelized dynamic huffman decoder
App. No. 60/459,233
→
Method and apparatus for scalable, backward-compatible, and non-blocking digital cross-connects
App. No. 60/414,699
→
Real-time tuner for providing graphical user interface
App. No. 60/380,393
→
Switch fabric architecture
App. No. 60/362,144
→
Non-blocking grooming switch architecture
App. No. 60/305,027
→