IP Library Assignment 036406/0920
Patent Assignment
Reel/Frame 036406/0920

Corrective Assignment to Correct the Third Inventor Name Previously Recorded at Reel: 033727 Frame: 0931. Assignor(S) Hereby Confirms the Assignment.

Recorded: 2015-08-20 Pages: 6
Assignors
MENON, SANKARAN
Executed: 2014-09-11
TRP, BANU
Executed: 2014-09-11
KUEHNIS, ROLF
Executed: 2015-08-19
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Low Power Debug Architecture for System-on-Chips (Socs) and Systems
Patent: 9,753,836 →
Application: 14/484,427 →
Publication: US 2016/0077905
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 12, 2014
From: MENON, SANKARAN; TRP, BABU; KUHNIS, ROLF
To: INTEL CORPORATION
Reel/Frame 033727/0931 →