IP Library Assignment 036554/0361
Patent Assignment
Reel/Frame 036554/0361

Assignment of Assignor's Interest

Recorded: 2015-09-04 Pages: 3
Assignors
IM, DA IN
Executed: 2015-08-19
SEO, YOUNG SUK
Executed: 2015-08-19
Assignee
SK HYNIX INC.
2091, GYEONGCHUNG-DAERO, BUBAL-EUB, ICHEON-SI GYEONGGI-DO, KOREA, REPUBLIC OF
Covered Property (1)
Clock Generation Circuit and Method and Semiconductor Apparatus and Electronic System Using the Same
Patent: 9,628,258 →
Application: 14/845,425 →
Publication: US 2017/0005782