IP Library Assignment 037022/0090
Patent Assignment
Reel/Frame 037022/0090

Assignment of Assignor's Interest

Recorded: 2015-11-12 Pages: 3
Assignors
LEE, YUEH-CHUAN
Executed: 2015-10-29
CHEN, CHIA-CHAN
Executed: 2015-10-29
CHIN, PING-CHIEH
Executed: 2015-10-29
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-78, TAIWAN
Covered Property (1)
Test Line Structure and Method for Performing Wafer Acceptance Test
Patent: 9,748,150 →
Application: 14/927,816 →
Publication: US 2017/0125309