IP Library Assignment 037205/0515
Patent Assignment
Reel/Frame 037205/0515

Assignment of Assignor's Interest

Recorded: 2015-12-03 Pages: 4
Assignors
BAL, JAGDEEP
Executed: 2015-12-03
POITRAS, LOUIS F.
Executed: 2015-12-03
Assignee
INTEGRATED DEVICE TECHNOLOGY, INC.
6024 SILVER CREEK VALLEY ROAD, SAN JOSE, CALIFORNIA, 95138
Covered Property (1)
System and Method for Deskewing Output Clock Signals
Patent: 9,614,508 →
Application: 14/958,701 →
Related Assignments (2)
Other recorded transfers of the patent in this record — the chain of ownership.
Security Agreement Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →