IP Library Assignment 037315/0700
Patent Assignment
Reel/Frame 037315/0700

RELEASE OF SECURITY INTEREST

Recorded: 2015-12-17 Received: 2015-12-17 Pages: 8
Assignor
Assignees
SPANSION LLC
915 DEGUIGNE DRIVE, SUNNYVALE, CA, 94088, UNITED STATES
SPANSION INC.
915 DEGUIGNE DRIVE, SUNNYVALE, CA, 94088, UNITED STATES
SPANSION TECHNOLOGY LLC
915 DEGUIGNE DRIVE, SUNNYVALE, CA, 94088, UNITED STATES
SPANSION TECHNOLOGY INC.
915 DEGUIGNE DRIVE, SUNNYVALE, CA, 94088, UNITED STATES
Covered Applications (19)
MEMORY DEVICE HAVING TRAPEZOIDAL BITLINES AND METHOD OF FABRICATING SAME
App. No. 13/357,252
METHOD FOR FORMING NARROW STRUCTURES IN A SEMICONDUCTOR DEVICE
App. No. 13/044,313
SYSTEM AND METHOD FOR IMPROVING MESA WIDTH IN A SEMICONDUCTOR DEVICE
App. No. 12/910,331
PLANARIZATION METHOD USING HYBRID OXIDE AND POLYSILICON CMP
App. No. 12/887,182
METHODS FOR FABRICATING DUAL BIT FLASH MEMORY DEVICES
App. No. 12/765,646
MEMORY DEVICE ETCH METHODS
App. No. 12/688,477
METAL-INSULATOR-METAL-INSULATOR-METAL (MIMIM) MEMORY DEVICE
App. No. 11/521,219
METHODS FOR FABRICATING FLASH MEMORY DEVICES
App. No. 11/412,365
METHODS FOR FABRICATING DUAL BIT FLASH MEMORY DEVICES
App. No. 11/410,695
GAP-FILLING WITH UNIFORM PROPERTIES
App. No. 11/408,086
METHOD OF FORMING A CONTACT IN A SEMICONDUCTOR DEVICE WITH ENGINEERED PLASMA TREATMENT PROFILE OF BARRIER METAL LAYER
App. No. 11/388,976
INTEGRATED CIRCUIT CONTACT SYSTEM
App. No. 11/286,173
SYSTEM AND METHOD FOR IMPROVING RELIABILITY IN A SEMICONDUCTOR DEVICE
App. No. 11/186,969
BURIED SILICIDE LOCAL INTERCONNECT WITH SIDEWALL SPACERS AND METHOD FOR MAKING THE SAME
App. No. 11/136,569
SYSTEM AND METHOD FOR IMPROVING OXIDE-NITRIDE-OXIDE (ONO) COUPLING IN A SEMICONDUCTOR DEVICE
App. No. 11/128,389
ORDERED POROSITY TO DIRECT MEMORY ELEMENT FORMATION
App. No. 11/110,165
FILM STACKS TO PREVENT UV-INDUCED DEVICE DAMAGE
App. No. 11/091,524
ULTRAVIOLET RADIATION BLOCKING INTERLAYER DIELECTRIC
App. No. 11/091,519
NON-VOLATILE MEMORY DEVICE WITH IMPROVED ERASE SPEED
App. No. 11/049,855