IP Library Assignment 038415/0997
Patent Assignment
Reel/Frame 038415/0997

Assignment of Assignor's Interest

Recorded: 2016-04-29 Pages: 3
Assignors
OHASHI, TAKUO
Executed: 2016-03-23
AISO, FUMIKI
Executed: 2016-04-01
Assignee
KABUSHIKI KAISHA TOSHIBA
1-1, SHIBAURA 1-CHOME, MINATO-KU, TOKYO, 105-8001, JAPAN
Covered Property (1)
Method of Manufacturing Semiconductor Memory Device Having Charge Accumulation Layer Positioned Between Control Gate Electrode and Semiconductor Layer
Patent: 9,793,290 →
Application: 15/071,497 →
Publication: US 2017/0018569
Related Assignments (4)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 14, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043541/0381 →
Merger Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
Change of Name and Address Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
Change of Name and Address Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →