Patent Assignment
Reel/Frame 039490/0701
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2016-08-19
Received: 2016-08-19
Pages: 6
Assignor
FREESCALE SEMICONDUCTOR, INC.
Executed: 2016-08-16
Assignee
VLSI TECHNOLOGY LLC
1209 ORANGE STREET, CORPORATION TRUST CENTER, WILMINGTON, DE, 19801, UNITED STATES
Covered Applications
(17)
Multi-Core System on Chip
App. No. 12/618,311
→
MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
App. No. 12/209,477
→
METHOD FOR POWER REDUCTION AND A DEVICE HAVING POWER REDUCTION CAPABILITIES
App. No. 11/914,079
→
METHOD FOR NOISE REDUCTION IN A PHASE LOCKED LOOP AND A DEVICE HAVING NOISE REDUCTION CAPABILITIES
App. No. 11/910,062
→
MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
PCTPCTUS2007064583
→
BIT LINE PRECHARGE IN EMBEDDED MEMORY
PCTPCTUS2007061842
→
BYTE WRITEABLE MEMORY WITH BIT-COLUMN VOLTAGE SELECTION AND COLUMN REDUNDANCY
App. No. 11/612,626
→
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING A FIN-TYPE STRUCTURE
PCTPCTUS2006061283
→
MEMORY WITH LEVEL SHIFTING WORD LINE DRIVER AND METHOD THEREOF
App. No. 11/433,998
→
BIT LINE PRECHARGE IN EMBEDDED MEMORY
App. No. 11/362,694
→
PROCESS FOR FORMING AN ELECTRONIC DEVICE INCLUDING A FIN-TYPE STRUCTURE
App. No. 11/328,668
→
INTEGRATED CIRCUIT HAVING STRUCTURAL SUPPORT FOR A FLIP-CHIP INTERCONNECT PAD AND METHOD THEREFOR
PCTPCTUS2005043220
→
CASCADABLE LEVEL SHIFTER CELL
App. No. 11/170,398
→
INTEGRATED CIRCUIT HAVING STRUCTURAL SUPPORT FOR A FLIP-CHIP INTERCONNECT PAD AND METHOD THEREFOR
App. No. 11/033,009
→
METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
App. No. 10/175,637
→
MULTIPHASE VOLTAGE CONTROLLED OSCILLATOR
App. No. 09/968,171
→
METHOD FOR FORMING A COPPER INTERCONNECT USING A MULTI-PLATEN CHEMICAL MECHANICAL POLISHING (CMP) PROCESS
App. No. 09/835,276
→