IP Library Assignment 039989/0728
Patent Assignment
Reel/Frame 039989/0728

Assignment of Assignor's Interest

Recorded: 2016-10-11 Pages: 5
Assignors
ZHU, HONGBIN
Executed: 2015-12-15
ZHAO, JUN
Executed: 2015-12-15
NARAYANAN, PURNIMA
Executed: 2015-12-15
HALLER, GORDON
Executed: 2015-12-15
FAZIL, DAMIR
Executed: 2015-12-15
Assignee
INTEL CORPORATION
2200 MISSION COLLEGE BOULEVARD, SANTA CLARA, CALIFORNIA, 95054
Covered Property (1)
Memory Devices and Systems Having Reduced Bit Line to Drain Select Gate Shorting and Associated Methods
Patent: 9,741,734 →
Application: 14/970,288 →
Publication: US 2017/0170190
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →