Patent Assignment
Reel/Frame 041122/0359
Assignment of Assignor's Interest
Recorded: 2017-01-30
Pages: 5
Assignors
LIN, JYUH-FUH
Executed: 2014-08-20
CHEN, CHENG-HUNG
Executed: 2014-08-21
LIU, PEI-YI
Executed: 2014-08-21
WANG, WEN-CHUAN
Executed: 2014-08-21
LIN, SHY-JAY
Executed: 2014-08-26
LIN, BURN JENG
Executed: 2014-08-29
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU, 300-77, TAIWAN
Covered Property
(1)
Method of Fabricating an Integrated Circuit with a Pattern Density-Outlier-Treatment for Optimized Pattern Density Uniformity