Patent Assignment
Reel/Frame 041225/0320
Assignment of Assignor's Interest
Recorded: 2017-02-10
Pages: 4
Assignors
CHOI, YANG-KYU
Executed: 2017-02-03
LEE, BYUNG-HYUN
Executed: 2017-02-03
KANG, MIN-HO
Executed: 2017-02-03
Assignee
KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
291, DAEHAK-RO, YUSEONG-GU, DAEJEON, 34141, KOREA, REPUBLIC OF
Covered Property
(1)
Junctionless Transistor Based on Vertically Integrated Gate-All-Round Multiple Nanowire Channels and Method of Manufacturing the Same