Patent Assignment
Reel/Frame 041321/0297
Assignment of Assignor's Interest
Recorded: 2017-02-21
Pages: 5
Assignors
HA, SANG HOON
Executed: 2016-11-04
PARK, JI YONG
Executed: 2016-11-04
LEE, KWANG HYUN
Executed: 2016-11-04
Assignee
SAMSUNG ELECTRONICS CO., LTD.
129 SAMSUNG-RO, YEONGTONG-GU, SUWON-SI, GYEONGGI-DO, 16677, KOREA, REPUBLIC OF
Covered Property
(1)
Correlated Double Sampling (Cds) Circuit for Decreasing Settling Time and Image Sensor Including the Same