Assignment of Assignor's Interest

Recorded: 2017-06-27 Pages: 5

Assignors

DUDHA, CHAITHANYA

Executed: 2017-06-22

SUN, SHANGZHI

Executed: 2017-06-22

SIRASAO, ASHISH

Executed: 2017-06-22

GUGGILLA, NITHIN KUMAR

Executed: 2017-06-23

Assignee

XILINX, INC.

2100 LOGIC DRIVE, SAN JOSE, CALIFORNIA, 95124

Covered Property (1)

Circuit Design Transformation for Automatic Latency Reduction

Patent: 10,289,786 →

Application: 15/634,016 →