Patent Assignment
Reel/Frame 042848/0029
Assignment of Assignor's Interest
Recorded: 2017-06-28
Pages: 18
Assignors
LAM, STEPHEN
Executed: 2016-04-21
CIPLICKAS, DENNIS
Executed: 2016-04-15
BROZEK, TOMASZ
Executed: 2016-04-20
CHENG, JEREMY
Executed: 2016-05-06
COMENSOLI, SIMONE
Executed: 2016-04-13
DE, INDRANIL
Executed: 2016-04-12
DOONG, KELVIN
Executed: 2016-04-28
EISENMANN, HANS
Executed: 2016-04-26
FISCUS, TIMOTHY
Executed: 2016-04-13
HAIGH, JONATHAN
Executed: 2016-04-13
HESS, CHRISTOPHER
Executed: 2016-04-12
KIBARIAN, JOHN
Executed: 2016-04-18
LEE, SHERRY
Executed: 2016-04-14
LIAO, MARCI
Executed: 2016-04-15
LIN, SHENG-CHE
Executed: 2016-04-28
MATSUHASHI, HIDEKI
Executed: 2016-04-25
MICHAELS, KIMON
Executed: 2016-04-18
O'SULLIVAN, CONOR
Executed: 2016-04-21
RAUSCHER, MARKUS
Executed: 2016-04-26
ROVNER, VYACHESLAV
Executed: 2016-04-13
STROJWAS, ANDRZEJ
Executed: 2016-04-28
STROJWAS, MARCIN
Executed: 2016-04-13
TAYLOR, CARL
Executed: 2016-04-13
VALLISHAYEE, RAKESH
Executed: 2016-04-12
WEILAND, LARG
Executed: 2016-04-21
YOKOYAMA, NOBUHARU
Executed: 2016-04-13
Assignee
PDF SOLUTIONS, INC.
333 W. SAN CARLOS ST., STE 1000, SAN JOSE, CALIFORNIA, 95110
Covered Properties
(14)
Integrated Circuit Containing First and Second Does of Standard Cell Compatible, Ncem-Enabled Fill Cells, with the First Doe Including via Open Configured Fill Cells, and the Second Doe Including Merged-via Open Configured Fill Cells
Patent:
9,761,502 →
Application:
15/633,040 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Via Open Configured Fill Cells, and the Second DOE Including Metal Island Open Configured Fill Cells
Patent:
9,818,660 →
Application:
15/633,920 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Via Open Configured Fill Cells, and the Second DOE Including Stitch Open Configured Fill Cells
Application:
15/634,176 →
Integrated Circuit Containing First and Second Does of Standard Cell Compatible, Ncem-Enabled Fill Cells, with the First Doe Including Merged-via Open Configured Fill Cells, and the Second Doe Including Snake Open Configured Fill Cells
Patent:
9,773,775 →
Application:
15/634,490 →
Process for Making and Using a Semiconductor Wafer Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Via Open Configured Fill Cells, and the Second DOE Including Metal Island Open Configured Fill Cells
Patent:
10,096,529 →
Application:
15/634,888 →
Process for Making and Using a Semiconductor Wafer Containing First and Second Does of Standard Cell Compatible, Ncem-Enabled Fill Cells, with the First Doe Including via Open Configured Fill Cells, and the Second Doe Including Stitch Open Configured Fill Cells
Patent:
9,786,649 →
Application:
15/634,896 →
Process for Making and Using a Semiconductor Wafer Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Merged-Via Open Configured Fill Cells, and the Second DOE Including Snake Open Configured Fill Cells
Patent:
9,768,083 →
Application:
15/634,915 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Merged-Via Open Configured Fill Cells, and the Second DOE Including Metal Island Open Configured Fill Cells
Patent:
9,766,970 →
Application:
15/635,259 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Merged-Via Open Configured Fill Cells, and the Second DOE Including Stitch Open Configured Fill Cells
Application:
15/635,312 →
Process for Making and Using a Semiconductor Wafer Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Merged-Via Open Configured Fill Cells, and the Second DOE Including Stitch Open Configured Fill Cells
Patent:
10,096,530 →
Application:
15/635,357 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Snake Open Configured Fill Cells, and the Second DOE Including Metal Island Open Configured Fill Cells
Patent:
9,778,974 →
Application:
15/635,396 →
Process for Making and Using a Semiconductor Wafer Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Snake Open Configured Fill Cells, and the Second DOE Including Metal Island Open Configured Fill Cells
Patent:
9,786,650 →
Application:
15/635,475 →
Integrated Circuit Containing First and Second DOEs of Standard Cell Compatible, NCEM-Enabled Fill Cells, with the First DOE Including Snake Open Configured Fill Cells, and the Second DOE Including Stitch Open Configured Fill Cells
Application:
15/635,524 →
Process for Making and Using a Semiconductor Wafer Containing First and Second Does of Standard Cell Compatible, Ncem-Enabled Fill Cells, with the First Doe Including Snake Open Configured Fill Cells, and the Second Doe Including Stitch Open Configured Fill Cells
Patent:
9,865,583 →
Application:
15/635,595 →
Related Assignments
(1)
Other recorded transfers of the patents in this record — the chain of ownership.