IP Library Assignment 042881/0430
Patent Assignment
Reel/Frame 042881/0430

Assignment of Assignor's Interest

Recorded: 2017-07-03 Pages: 13
Assignors
CHATTOPADHYAY, BIMAN, MR
Executed: 2017-07-03
CHAKRAVARTY, SUJOY, MR
Executed: 2017-07-03
MEHTA, RAVI, MR
Executed: 2017-07-03
NAYAK, GOPALKRISHNA, MR
Executed: 2017-07-03
Assignee
SILABTECH PRIVATE LIMITED
A BLOCK, AECS LAYOUT, KUNDALAHALLI, #303, 2ND FLOOR, BANGALORE, 560037, INDIA
Covered Property (1)
Method and Apparatus for Managing Estimation and Calibration of Non-Ideality of a Phase Interpolator (Pi)-Based Clock and Data Recovery (Cdr) Circuit
Patent: 9,548,855 →
Application: 14/834,357 →
Publication: US 2016/0056949
Related Assignments (1)
Other recorded transfers of the patent in this record — the chain of ownership.
Assignment of Assignor's Interest Jul 10, 2018
From: SILICON AND BEYOND PRIVATE LIMITED
To: SYNOPSYS, INC.
Reel/Frame 046306/0135 →