Assignment of Assignor's Interest

Recorded: 2017-10-11 Pages: 5

Assignors

HOSANGADI, ANUP

Executed: 2017-10-10

DATTA, SUMANTA

Executed: 2017-10-11

GAYASEN, AMAN

Executed: 2017-10-11

SIRASAO, ASHISH

Executed: 2017-10-10

Assignee

XILINX, INC.

2100 LOGIC DRIVE, SAN JOSE, CALIFORNIA, 95124

Covered Property (1)

Loop Optimization for Implementing Circuit Designs in Hardware

Patent: 10,331,836 →

Application: 15/730,431 →