Patent Assignment
Reel/Frame 044734/0423
Assignment of Assignor's Interest
Recorded: 2018-01-26
Pages: 4
Assignors
WANG, JING-SEN
Executed: 2017-12-26
CHANG, YUAN-YAO
Executed: 2017-12-27
CHIU, HUNG-CHI
Executed: 2017-12-27
HUANG, CHIA-WEI
Executed: 2017-12-27
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO.8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK,, HSINCHU, 300-78, TAIWAN
Covered Property
(1)
Method, Test Line and System for Detecting Semiconductor Wafer Defects