Patent Assignment
Reel/Frame 045808/0450
Assignment of Assignor's Interest
Recorded: 2018-05-15
Pages: 4
Assignors
CHEN, SHENG-HSIUNG
Executed: 2018-04-17
LIN, CHUNG-TE
Executed: 2018-04-27
CHANG, FONG-YUAN
Executed: 2018-04-17
YU, HO CHE
Executed: 2018-04-17
TIEN, LI-CHUN
Executed: 2018-04-23
Assignee
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
NO. 8, LI-HSIN RD. 6, HSINCHU SCIENCE PARK, HSINCHU, 300-77, TAIWAN
Covered Property
(1)
Integrated Circuit and Layout Method for Standard Cell Structures